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description
- Clock Management: PLL
- Core Supply Voltage Max: 1.575V
- Core Supply Voltage Min: 1.425V
- FPGA Family: ProASIC3
- I/O Supply Voltage: 3.3V
- Logic Case Style: VQFP
- MSL: MSL 3 - 168 hours
- No. of I/O's: 68I/O's
- No. of Logic Blocks: -
- No. of Macrocells: 2048
- No. of Pins: 100Pins
- No. of Speed Grades: -
- Operating Frequency Max: 350MHz
- Product Range: ProASIC3 A3P250
- Total RAM Bits: 36Kbit